EP20K600CF672I7 vs EP20K600CF672I7N 对比
详细并排对比 EP20K600CF672I7 出自 Altera 和 EP20K600CF672I7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K600CF672I7 | EP20K600CF672I7N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $220.00 | $232.00 |
| Family | APEX 20KC | APEX 20KC |
| Maximum Logic Elements | 24,320 cells | — |
| System Gates | 600,000 | — |
| Maximum User I/O | 508 | — |
| Maximum Internal Frequency | 375.94 MHz | 376 MHz |
| Process Technology | 0.15 µm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V (LVTTL/LVCMOS compatible) | — |
| Speed Grade | -7 | I7 (-40 °C to +100 °C industrial) |
| 工作温度 | -40 °C to +100 °C (industrial, I-suffix) | — |
| 封装 | 672-ball FineLine BGA (FC-FBGA, 27×27 mm) | 672-ball FineLine BGA (FC-FBGA) |
| Ball Pitch | 1.00 mm | 1.0 mm |
| Embedded System Blocks | Yes (dual-port RAM / CAM) | — |
| Configuration Interface | IEEE 1149.1 JTAG, passive serial, fast passive parallel | — |
| 安装类型 | Surface Mount (BGA) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Technology | — | 0.15 µm CMOS |
| Maximum System Gates | — | 600,000 |
| Logic Elements | — | 24,320 |
| Maximum User I/O Pins | — | 508 |
| Embedded System Blocks (ESBs) | — | 160 |
| Total Embedded RAM (max) | — | 311,296 bits |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 2.5 V / 3.3 V (MultiVolt, bank-dependent) |
| Package Body Size | — | 27 mm × 27 mm |
| Propagation Delay (typical) | — | 1.6 ns |
| Configuration Method | — | JTAG (IEEE 1149.1) + EPC configuration device |
| Lead-Free Finish (N suffix) | — | Yes |