EP20K600CF672I7N vs EP20K600CF672I-8ES 对比

详细并排对比 EP20K600CF672I7N 出自 Intel 和 EP20K600CF672I-8ES 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672I7N EP20K600CF672I-8ES
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $232.00 $119.00
Family APEX 20KC APEX 20KC
Technology 0.15 µm CMOS —
Maximum System Gates 600,000 —
Logic Elements 24,320 24,320
Maximum User I/O Pins 508 508
Maximum Internal Frequency 376 MHz —
Embedded System Blocks (ESBs) 160 —
Total Embedded RAM (max) 311,296 bits —
Core Voltage (VCCINT) 1.8 V —
I/O Voltage (VCCIO) 2.5 V / 3.3 V (MultiVolt, bank-dependent) —
封装 672-ball FineLine BGA (FC-FBGA) 672-ball BGA (FineLine BGA, 1.27 mm pitch)
Ball Pitch 1.0 mm —
Package Body Size 27 mm × 27 mm —
Speed Grade I7 (-40 °C to +100 °C industrial) -8 (slower)
Propagation Delay (typical) 1.6 ns —
Configuration Method JTAG (IEEE 1149.1) + EPC configuration device —
Lead-Free Finish (N suffix) Yes —
RoHS 状态 [DATA_NEEDED: RoHS compliance] Non-compliant (legacy Altera leaded BGA process)
Typical Gates — 600,000 (ASIC-equivalent)
Embedded Memory Bits — 311,296
Embedded PLLs — 4
Core Voltage — 1.8 V
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+
Process Technology — 0.18 micron CMOS SRAM
工作温度 — -40C to +100C (Industrial)
Configuration Modes — Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG
In-System Programmability — Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1)
MSL 等级 — [DATA_NEEDED: moisture sensitivity level]

数据手册与资源

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