EP20K600CF672I8 vs EP20K600CF672I7N 对比

详细并排对比 EP20K600CF672I8 出自 Altera 和 EP20K600CF672I7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600CF672I8 EP20K600CF672I7N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $195.00 $232.00
Family APEX 20KC APEX 20KC
Device Type SPLD / FPGA —
Logic Elements / Cells 24,320 —
Macros (Logic Cells) 2432 —
Typical Gate Count 600,000 gates —
Embedded Memory 311,296 bits —
User I/Os 488 to 508 —
引脚数 652 (functional) / 672 (BGA balls) —
Propagation Delay (typical) 1.48 ns 1.6 ns
Internal Frequency (max) [DATA_NEEDED: max internal frequency in MHz] —
Core Supply Voltage 1.8 V —
Process Technology 0.15 µm all-layer copper —
工作温度 0 °C to +85 °C (Industrial) —
Package Type 672-ball BGA, 45 x 45 mm, 1.27 mm pitch —
安装类型 Surface Mount —
RoHS 状态 Compliant per legacy product records [DATA_NEEDED: RoHS compliance]
Configuration Interface JTAG / Passive Serial —
Design Tool Quartus II (legacy MAX+PLUS II) —
Technology — 0.15 µm CMOS
Maximum System Gates — 600,000
Logic Elements — 24,320
Maximum User I/O Pins — 508
Maximum Internal Frequency — 376 MHz
Embedded System Blocks (ESBs) — 160
Total Embedded RAM (max) — 311,296 bits
Core Voltage (VCCINT) — 1.8 V
I/O Voltage (VCCIO) — 2.5 V / 3.3 V (MultiVolt, bank-dependent)
封装 — 672-ball FineLine BGA (FC-FBGA)
Ball Pitch — 1.0 mm
Package Body Size — 27 mm × 27 mm
Speed Grade — I7 (-40 °C to +100 °C industrial)
Configuration Method — JTAG (IEEE 1149.1) + EPC configuration device
Lead-Free Finish (N suffix) — Yes

数据手册与资源

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