EP20K600EFC144-2XN vs EP20K600EFC33-2X 对比

详细并排对比 EP20K600EFC144-2XN 出自 Altera 和 EP20K600EFC33-2X 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600EFC144-2XN EP20K600EFC33-2X
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $115.00 $815.00
Family APEX 20KE APEX 20K (System-on-a-Programmable-Chip)
Logic Elements 24,576 —
Typical Gates 600,000 —
Maximum System Gates 1,053,840 —
Embedded RAM Bits 311,040 bits (~38 KB) —
Number of ESBs (Embedded System Blocks) [DATA_NEEDED: ESB count] —
Number of Multiplier Blocks [DATA_NEEDED: multiplier count] —
Number of PLLs 4 —
Number of I/O Pins [DATA_NEEDED: usable I/O count] —
Core Voltage 1.8 V —
I/O Voltage Banks Multi-voltage (LVTTL/LVCMOS/PCI) —
Process Technology 0.18 um CMOS, 6-layer metal 0.15 um all-layer copper metal
Speed Grade -2 (mid-tier) —
封装 144-ball FineLine BGA 1020-ball FC-FBGA (33 mm x 33 mm)
工作温度 -40C to +85C (industrial, 'N' suffix) 0C to +85C
RoHS 状态 [DATA_NEEDED: RoHS] Non-compliant (legacy Altera product)
Configuration Method SRAM, IEEE 1532 / passive serial / passive parallel —
Series — APEX-20KE
Logic Elements / Cells — 24320
Total Gates — 600000
Total RAM Bits — 311296
Number of I/O — 588
Core Supply Voltage — 1.71 V to 1.89 V (1.8 V nominal)
Maximum Internal Frequency — 200 MHz
Propagation Delay — 1.48 ns
Ball Pitch — 1.27 mm
安装类型 — Surface Mount
Lead-Free Status — Contains lead (legacy)
Multi-Voltage I/O Support — 1.5V / 1.8V / 2.5V / 3.3V / 5.0V
Embedded System Blocks — Dual-port RAM / FIFO configurable

数据手册与资源

浏览全部产品 创建 BOM 获取报价