EP20K600EFC144-2XN vs EP20K60EFC144-2XN 对比

详细并排对比 EP20K600EFC144-2XN 出自 Altera 和 EP20K60EFC144-2XN 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600EFC144-2XN EP20K60EFC144-2XN
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $115.00 $152.00
Family APEX 20KE APEX-20K (MultiCore Architecture)
Logic Elements 24,576 —
Typical Gates 600,000 —
Maximum System Gates 1,053,840 —
Embedded RAM Bits 311,040 bits (~38 KB) —
Number of ESBs (Embedded System Blocks) [DATA_NEEDED: ESB count] —
Number of Multiplier Blocks [DATA_NEEDED: multiplier count] —
Number of PLLs 4 —
Number of I/O Pins [DATA_NEEDED: usable I/O count] —
Core Voltage 1.8 V —
I/O Voltage Banks Multi-voltage (LVTTL/LVCMOS/PCI) —
Process Technology 0.18 um CMOS, 6-layer metal —
Speed Grade -2 (mid-tier) -2 (per MPN suffix)
封装 144-ball FineLine BGA —
工作温度 -40C to +85C (industrial, 'N' suffix) —
RoHS 状态 [DATA_NEEDED: RoHS] [DATA_NEEDED: RoHS status]
Configuration Method SRAM, IEEE 1532 / passive serial / passive parallel JTAG (IEEE 1149.1), Passive Serial, Parallel
Series — APEX-20KE
Typical Gate Count — 60,000 gates
Logic Elements / Embedded Array Blocks — 2,560
Embedded Memory (Bits) — 32,768
Maximum User I/O — 93
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Core Supply Voltage (VCCINT) — 1.71 V to 1.89 V
I/O Supply Voltage (VCCIO) — [DATA_NEEDED: VCCIO range]
Package Type — 144-BGA (Fine-pitch Ball Grid Array)
Package Code (per MPN suffix) — FBGA / LBGA, 13x13 mm
安装类型 — Surface Mount
Operating Temperature (TJ) — 0 C to +85 C (commercial)
Logic Family — CMOS, SRAM-based LUT

数据手册与资源

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