EP20K600EFC672-1X vs EP20K600EFC672-1XN 对比

详细并排对比 EP20K600EFC672-1X 出自 Intel 和 EP20K600EFC672-1XN 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600EFC672-1X EP20K600EFC672-1XN
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $980.00 $285.00
Series APEX 20KE —
Family APEX 20K APEX 20K (APEX-20KE)
System Gates 600,000 (1.5 M maximum) 1,560,000 (typical 600K)
Logic Elements (LEs) 24,320 —
Embedded RAM Bits 311,296 —
User I/Os 488 (DigiKey reports 508; verify per datasheet) —
Number of Macros 2,432 —
Number of Logic Cells 24,320 —
封装 672-BGA FineLine (FC-FBGA), 45 x 45 mm, 1.27 mm pitch 672-ball FineLine BGA (FBGA)
引脚数量 652 / 672 —
工作温度 0 °C to +85 °C (commercial) 0C to 85C (commercial)
Supply Voltage (Core) 1.8 V 1.8 V typical
I/O Voltage Support 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS (MultiVolt I/O) —
Process Technology 0.15 µm all-layer copper CMOS 0.18 micron CMOS
Internal Frequency 250 MHz —
Propagation Delay 1.48 ns —
Architecture MultiCore (LUT + product-term + embedded memory) —
Speed Grade -1 (slowest) -1 (fastest)
RoHS 状态 Compliant (X suffix denotes lead-free) [DATA_NEEDED: RoHS status]
Programming Toolchain Quartus II / MAX+PLUS II (legacy APEX 20KE support) —
Logic Elements — 24,320
Typical Logic Elements — 311,296
Macros (Logic Array Blocks) — 2,432
User I/O Pins — 508
Total RAM Bits — [DATA_NEEDED: total RAM bits]
Ball Pitch — 1.0 mm
Configuration Method — Serial or parallel, JTAG
安装类型 — Surface Mount (BGA)
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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