EP20K600EFC672-2X vs EP20K400FI784-1 对比

详细并排对比 EP20K600EFC672-2X 出自 Intel 和 EP20K400FI784-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K600EFC672-2X EP20K400FI784-1
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $115.00 $175.00
Family APEX 20KE APEX 20K
Typical Gates 600,000 —
Logic Elements / Cells 24,320 —
Embedded Memory Bits 311,296 —
Maximum User I/O 508 488
Number of PLLs 4 —
Package Type 672-pin FineLine BGA (FC-FBGA) 784-ball Fine-pitch BGA (S-PBGA-B784)
Package Size 45 x 45 mm, 1.27 mm pitch —
Core Voltage 1.8 V —
Process Technology 0.15 µm all-layer copper CMOS 0.18 µm CMOS, 6-layer metal
Propagation Delay (typical) 1.48 ns —
Maximum Internal Frequency 200 MHz —
工作温度 0 °C to +85 °C (commercial) —
Lead-Free Variant EP20K600EFC672-2N —
RoHS 状态 Not RoHS compliant (X suffix is SnPb); use -2N suffix for lead-free —
Configuration Method Serial / Parallel (Quartus-supported) —
Series — EP20K400
Device Type — Loadable PLD (FPGA-class)
Usable Gates — 400,000
Logic Elements — 1,560
Embedded Memory (EAB RAM) — 212,992 bits
Maximum Internal Clock Frequency — 6.1 GHz
安装类型 — Surface Mount
工作结温 — -40°C to +100°C (industrial 'I')
Supply Voltage - Core — 1.8 V
I/O Standards Supported — 3.3 V / 5 V PCI, LVTTL, LVCMOS
Dedicated Inputs — 4
Boundary Scan — JTAG IEEE 1149.1
Lead-Free / RoHS — [DATA_NEEDED: RoHS status]

数据手册与资源

浏览全部产品 创建 BOM 获取报价