EP20K60EFC324-1X vs EP20K60EFC324-2N 对比

详细并排对比 EP20K60EFC324-1X 出自 Altera 和 EP20K60EFC324-2N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K60EFC324-1X EP20K60EFC324-2N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $198.00 $52.73
Series APEX 20KE APEX-20KE
Family APEX 20K APEX 20K
Number of Logic Elements / Cells 2,560 —
Total Gates 60,000 (162,000 max system gates) —
Total RAM Bits 32,768 32,768
Number of I/O 196 196
Number of LABs / CLBs 2,560 —
Number of Embedded System Blocks (ESBs) 16 —
Number of PLLs 4 —
Voltage - Supply (VCCINT) 1.71 V to 1.89 V (1.8 V nominal) —
工作温度 0 °C to 85 °C (TJ) —
Internal Frequency (max) 250 MHz 200 MHz
Propagation Delay 1.72 ns 1.72 ns
Process Technology 0.22 µm CMOS, 5-metal 0.22 µm CMOS
Supplier Device Package 324-FBGA (19x19 mm, 1.0 mm pitch) 324-FBGA (19x19)
安装类型 Surface Mount Surface Mount
Speed Grade -1 —
RoHS 状态 [DATA_NEEDED: RoHS status] unknown
Programming Mode In-system via JTAG / Passive Serial / Passive Parallel —
Number of Logic Elements/Cells — 2,560
Total System Gates — 60,000
Number of Logic Array Blocks (LABs/CLBs) — 2,560
Core Voltage Supply — 1.71 V to 1.89 V (1.8 V typ.)
Operating Temperature Range (TJ) — 0 °C to 85 °C (commercial)
封装 / 外壳 — 324-BGA (FineLine BGA, 19x19 mm)
Architecture — MultiCore (LUT + ESB memory + product-term)
Configuration Method — Passive Serial / JTAG (IEEE 1149.1)

数据手册与资源

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