EP20K60EFC324-2N vs EP20K60EFC324-2X 对比
详细并排对比 EP20K60EFC324-2N 出自 Altera 和 EP20K60EFC324-2X 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K60EFC324-2N | EP20K60EFC324-2X |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $52.73 | $195.50 |
| Series | APEX-20KE | — |
| Family | APEX 20K | APEX-20KE |
| Number of Logic Elements/Cells | 2,560 | — |
| Total System Gates | 60,000 | — |
| Number of Logic Array Blocks (LABs/CLBs) | 2,560 | — |
| Total RAM Bits | 32,768 | 32,768 |
| Number of I/O | 196 | — |
| Core Voltage Supply | 1.71 V to 1.89 V (1.8 V typ.) | — |
| Internal Frequency (max) | 200 MHz | — |
| Propagation Delay | 1.72 ns | — |
| Operating Temperature Range (TJ) | 0 °C to 85 °C (commercial) | — |
| 封装 / 外壳 | 324-BGA (FineLine BGA, 19x19 mm) | — |
| Supplier Device Package | 324-FBGA (19x19) | — |
| 安装类型 | Surface Mount | — |
| Process Technology | 0.22 µm CMOS | — |
| Architecture | MultiCore (LUT + ESB memory + product-term) | — |
| Configuration Method | Passive Serial / JTAG (IEEE 1149.1) | — |
| RoHS 状态 | unknown | [DATA_NEEDED: RoHS compliance] |
| Number of Logic Elements (LEs) | — | 2,560 |
| Typical Gates | — | 60,000 |
| Number of I/O Pins | — | 196 |
| Number of Embedded System Blocks (ESBs) | — | 16 |
| Number of PLLs | — | 4 |
| Core Voltage | — | 1.71 V to 1.89 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Package Type | — | 324-FBGA (Fine-pitch BGA) |
| Package Dimensions | — | 19 mm × 19 mm |
| Operating Temperature Grade | — | Industrial (per -2 speed suffix) |
| Configuration Mode | — | Passive Serial / Passive Parallel (Async & Sync) |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |