EP20K60EFC324-2N vs EP20K60EFC324-3 对比

详细并排对比 EP20K60EFC324-2N 出自 Altera 和 EP20K60EFC324-3 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K60EFC324-2N EP20K60EFC324-3
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $52.73 $58.40
Series APEX-20KE APEX 20KE
Family APEX 20K APEX 20K
Number of Logic Elements/Cells 2,560 —
Total System Gates 60,000 —
Number of Logic Array Blocks (LABs/CLBs) 2,560 —
Total RAM Bits 32,768 —
Number of I/O 196 —
Core Voltage Supply 1.71 V to 1.89 V (1.8 V typ.) —
Internal Frequency (max) 200 MHz 160 MHz
Propagation Delay 1.72 ns 1.72 ns
Operating Temperature Range (TJ) 0 °C to 85 °C (commercial) —
封装 / 外壳 324-BGA (FineLine BGA, 19x19 mm) 324-FBGA (19x19 mm, 1.0 mm pitch)
Supplier Device Package 324-FBGA (19x19) —
安装类型 Surface Mount Surface Mount
Process Technology 0.22 µm CMOS 0.22 µm CMOS
Architecture MultiCore (LUT + ESB memory + product-term) —
Configuration Method Passive Serial / JTAG (IEEE 1149.1) —
RoHS 状态 unknown unknown
Logic Elements / Cells — 2560
Total Gates — 60000
User I/Os — 196
Number of Logic Blocks / LABs — 256
Embedded Memory (EAB/ESB) Bits — 24576
Peak Performance Frequency — 182 MHz
Core Voltage (VCCINT) — 1.8 V (1.71 V to 1.89 V)
I/O Voltage (VCCIO) — 3.3 V (3.0 V to 3.6 V)
Logic Family — CMOS
工作温度 — 0°C to +85°C (commercial)
Programmable Type — In-system programmable (SRAM)
Configuration Interface — JTAG (IEEE 1149.1) + passive serial

数据手册与资源

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