EP2A25F672C8 vs EP2A25F672C8N 对比
详细并排对比 EP2A25F672C8 出自 Altera 和 EP2A25F672C8N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A25F672C8 | EP2A25F672C8N |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $951.18 | $205.00 |
| Family | APEX II (EP2A25) | APEX II |
| Logic Elements | 25,000 (typical gates) | — |
| Maximum System Gates | 40,960 | — |
| Macrocells / Embedded Logic | 2,432 macros | — |
| User I/O Count | 492 | — |
| 封装 | 672-FBGA (FineLine BGA, 27x27 mm, 1.0 mm pitch) | 672-ball FC-FBGA (FineLine BGA) |
| Propagation Delay (tpd) | 1.69 ns | — |
| Speed Grade | C8 | C8 |
| 工作温度 | 0 C to 85 C (commercial) | 0 C to 85 C (commercial) |
| Process Technology | 0.15 microm CMOS, 8-layer copper interconnect | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI-X, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL | — |
| LVDS Data Rate | 1 Gbps | — |
| PLL Count | 4 | — |
| Embedded Memory | ESB blocks (dual-port RAM, FIFO, CAM, ROM) | — |
| I/O Banks | 16 | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | Non-compliant (legacy product) | Compliant |
| Technology Node | — | 0.15 um all-layer copper process |
| System Gates | — | 900,000 |
| Logic Elements / Cells | — | 24,320 |
| Maximum Internal Frequency | — | 333 MHz |
| Propagation Delay | — | 1.69 ns |
| User I/Os | — | 492 |
| Package Body Size | — | 27 x 27 mm |
| Ball Pitch | — | 1.0 mm |
| Core Supply Voltage | — | 1.5 V |
| Multi-Gigabit Transceiver Rate | — | Up to 1 Gbps per channel |
| Lead-Free Suffix | — | N (lead-free, Pb-free finish) |