EP2A25F672C9 vs EP2A25F672C9ES 对比
详细并排对比 EP2A25F672C9 出自 Altera 和 EP2A25F672C9ES 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A25F672C9 | EP2A25F672C9ES |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $700.00 | $122.00 |
| Family | APEX II | APEX II |
| Logic Elements (LE) | Approximately 25,000 | — |
| Macro Cells | 2432 | — |
| User I/O | 492 | — |
| 封装 | 672-ball FCBGA (FineLine BGA) | 672-pin FC-FBGA (FineLine BGA), 27 x 27 mm, 1.0 mm pitch |
| Package Dimensions | 27 mm x 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.15 µm CMOS (up to 8 metal layers, all-layer copper) |
| Logic Family | CMOS | CMOS |
| Propagation Delay | 1.69 ns | 1.69 ns |
| 工作温度 | 0°C to 85°C (Commercial) | 0 °C to 85 °C (Commercial) |
| 电源电压 | [DATA_NEEDED: core VCC voltage] | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) | — |
| Configuration | Passive Serial, Passive Parallel Synchronous, JTAG | — |
| Embedded Memory | ESBs for dual-port RAM, ROM, FIFO | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | [DATA_NEEDED] | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements | — | 24,320 |
| System Gates | — | 900,000 |
| Maximum Operating Frequency | — | 236 MHz |
| Core Supply Voltage | — | 1.5 V |
| User I/Os | — | 492 |
| Speed Grade | — | -9 |
| Configuration Class | — | ES (Enhanced) |
| MSL 等级 | — | [DATA_NEEDED: MSL moisture sensitivity level] |