EP2A25F724 vs EP2A25F672I8 对比

详细并排对比 EP2A25F724 出自 Altera 和 EP2A25F672I8 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A25F724 EP2A25F672I8
品牌 Altera Altera
分类 Memory ICs FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $112.00 $125.00
Device Type Enhanced Configuration Device (EPC) —
Target FPGA Family Altera APEX II (EP2A-series) —
Memory Technology Flash (non-volatile, no battery required) —
Configuration Modes Passive Serial, Passive Parallel Async, Passive Parallel Sync —
封装 724-ball FineLine BGA 672-ball FC-FBGA (FineLine BGA), 27 × 27 mm, 1 mm pitch
JTAG Support IEEE Std. 1149.1 (boundary-scan / ISP) —
Multi-Device Configuration Yes - supports daisy-chained APEX II FPGAs —
In-System Programmability Yes (via JTAG) —
工作温度 [DATA_NEEDED: operating temperature grade] –40 °C to +85 °C (industrial, 'I' grade)
电源电压 [DATA_NEEDED: VCC nominal] —
On-chip Oscillator Yes (internal configuration clock) —
User Flash Region Yes (separate from configuration data) —
安装类型 Surface Mount (BGA) Surface Mount (BGA)
RoHS 状态 Compliant unknown
生命周期状态 Not Recommended for New Designs (NRND) - Altera acquired by Intel 2015 —
Family — APEX II
Logic Elements / Cells — 24,320
Equivalent Gates — 900,000
Embedded Memory (RAM bits) — 622,592
User I/Os — 492
Number of PLLs — 4
Process Technology — 0.15 µm CMOS, up to 8 metal layers
Core Supply Voltage — 1.5 V
Propagation Delay — 1.69 ns (typical)
Internal Performance — 333 MHz (per legacy datasheet)
LVDS / High-Speed I/O — Yes, up to 1 Gbps
Speed Grade — I8 (industrial, 8-speed-grade per APEX II ordering scheme)
JTAG / Boundary Scan — IEEE 1149.1 compliant
I/O Standards Supported — LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, GTL+, PCI
Lead-Free Status — unknown

数据手册与资源

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