EP2A40B724I-8 vs EP2A40B724C7 对比

详细并排对比 EP2A40B724I-8 出自 Altera 和 EP2A40B724C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A40B724I-8 EP2A40B724C7
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $280.00 $650.00
Family APEX II APEX II
Logic Elements (LEs) 38,400 —
Logic Array Blocks (LABs) 3,840 —
Embedded System RAM 655,360 bits (655 Kbits) —
Maximum User I/O 540 540
封装 724-ball FineLine BGA 724-ball FCBGA (FineLine BGA), 35 mm x 35 mm
Package Code HBGA / S-PBGA-B724 —
Speed Grade -8 —
工作温度 -40C to +100C (Industrial) 0 °C to +85 °C (commercial)
Core Supply Voltage 1.5 V (1.425 V to 1.575 V) 1.425 V to 1.575 V (typ. 1.5 V)
I/O Banks [DATA_NEEDED: I/O bank count] —
PLLs 4 4
安装类型 Surface Mount Surface Mount (BGA)
RoHS 状态 [DATA_NEEDED: RoHS status] Non-compliant (lead-bearing FCBGA)
Configuration Mode JTAG / passive serial / passive parallel —
Process Node [DATA_NEEDED: process technology] —
Logic Elements / Cells — 38,400
Total System Gates — 1,500,000
Embedded RAM Bits — 655,360
Process Technology — 0.15 µm CMOS, up to 8 metal layers, all-layer copper
Maximum Internal Frequency — 562 MHz
I/O Standards Supported — LVTTL, LVCMOS, 1.5 V/1.8 V/2.5 V/3.3 V, SSTL, HSTL, PCI, LVDS, LVPECL, PCML, HyperTransport, True-LVDS (1 Gbps)
Configuration Method — JTAG (IEEE 1149.1), Passive Serial, Passive Parallel, Active Serial via EPC configuration devices
MultiVolt I/O Support — 1.5 V, 1.8 V, 2.5 V, 3.3 V
DDR Memory Support — Yes (via ESB / I/O circuitry)
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

浏览全部产品 创建 BOM 获取报价