EP2A40B724I7 vs EP2A40B724C7 对比

详细并排对比 EP2A40B724I7 出自 Intel 和 EP2A40B724C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A40B724I7 EP2A40B724C7
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $215.00 $650.00
Family APEX II APEX II
Logic Elements / Cells 38,400 38,400
System Gates 1,500,000 —
Maximum Operating Frequency 562 MHz —
Process Technology 0.15 µm CMOS 0.15 µm CMOS, up to 8 metal layers, all-layer copper
Core Supply Voltage 1.5 V 1.425 V to 1.575 V (typ. 1.5 V)
Package Type 724-pin FCBGA (Flip-Chip BGA) —
Package Pin Count 724 —
工作温度 -40 °C to +100 °C (Industrial) 0 °C to +85 °C (commercial)
Configuration Mode SRAM-based, JTAG / Passive Serial / Active Serial —
Embedded Memory Blocks ESBs (Embedded System Blocks) - configurable as RAM/ROM —
I/O Standards LVTTL, LVCMOS, PCI, LVDS, SSTL —
安装类型 Surface Mount Surface Mount (BGA)
Lead-Free / RoHS Status [DATA_NEEDED: RoHS status] —
MSL (Moisture Sensitivity Level) [DATA_NEEDED: MSL level] —
Device Marking / Speed Grade I7 (industrial, speed grade 7) —
Total System Gates — 1,500,000
Embedded RAM Bits — 655,360
Maximum User I/O — 540
Maximum Internal Frequency — 562 MHz
PLLs — 4
封装 — 724-ball FCBGA (FineLine BGA), 35 mm x 35 mm
I/O Standards Supported — LVTTL, LVCMOS, 1.5 V/1.8 V/2.5 V/3.3 V, SSTL, HSTL, PCI, LVDS, LVPECL, PCML, HyperTransport, True-LVDS (1 Gbps)
Configuration Method — JTAG (IEEE 1149.1), Passive Serial, Passive Parallel, Active Serial via EPC configuration devices
MultiVolt I/O Support — 1.5 V, 1.8 V, 2.5 V, 3.3 V
DDR Memory Support — Yes (via ESB / I/O circuitry)
RoHS 状态 — Non-compliant (lead-bearing FCBGA)
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

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