EP2A40F1020C7N vs EP2A40F1020C7ES 对比

详细并排对比 EP2A40F1020C7N 出自 Intel 和 EP2A40F1020C7ES 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A40F1020C7N EP2A40F1020C7ES
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $198.00 $185.00
Family APEX II APEX II
Technology 0.15 µm all-layer copper CMOS, up to 8 metal layers —
System Gates 1,500,000 (1.5 M) —
Logic Elements 38,400 38,400
Embedded Memory ESB-based, 504 Kbits total 655,360 bits
Maximum Internal Performance 562 MHz —
Propagation Delay 1.55 ns —
User I/O Pins 735 —
PLLs 4 Up to 8 (per datasheet family feature)
Clock Networks 12 —
True-LVDS Data Rate 1 Gbps —
Supported I/O Standards True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, SSTL —
Core Supply Voltage 1.5 V nominal (1.425 V – 1.575 V) —
Logic Family CMOS —
封装 FC-FBGA-1020, 33 × 33 mm, 1.0 mm pitch, fine-line 1020-pin FC-FBGA
工作温度 0 °C to +85 °C (commercial, C7 grade) [DATA_NEEDED: commercial/industrial grade]
Terminal Form BGA ball (flip-chip) —
安装类型 Surface Mount Surface Mount (FC-FBGA)
Typical Gates — 1,500,000
Maximum User I/O — 735
Maximum Frequency — 562 MHz
Process Technology — 0.15 µm CMOS, all-layer copper, up to 8 metal layers
Core Voltage — 1.5 V
Speed Grade — C7 (with ES enhanced speed suffix)
High-Speed Interface — 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport
I/O Standards — LVTTL, LVCMOS, LVDS, LVPECL, PCML, HyperTransport, 1.5/1.8/2.5/3.3 V
RoHS 状态 — [DATA_NEEDED]
Programming Interface — JTAG (IEEE 1149.1), passive serial

数据手册与资源

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