EP2A40F1020C8 vs EP2A40F1020C6 对比
详细并排对比 EP2A40F1020C8 出自 Intel 和 EP2A40F1020C6 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A40F1020C8 | EP2A40F1020C6 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $310.00 | $149.00 |
| Family | APEX II | APEX II |
| Logic Family | CMOS | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.15 µm CMOS |
| System Gates | 1,500,000 | — |
| Logic Cells | 38,400 | — |
| Macros / Macro Cells | 2,560 | — |
| Embedded RAM | [DATA_NEEDED: total ESB bits] | — |
| Maximum Internal Frequency | 376 MHz | — |
| Propagation Delay | 1.55 ns | — |
| User I/O Pins | 735 | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V | — |
| Package Type | FC-FBGA (FineLine BGA) | — |
| Package Pin Count | 1020 | — |
| Package Dimensions | 33 x 33 mm | — |
| Ball Pitch | 1.0 mm | — |
| 工作温度 | 0 C to +85 C (commercial, 'C' suffix) | — |
| RoHS 状态 | [DATA_NEEDED: confirm per lot] | [DATA_NEEDED: RoHS status] |
| Configuration Interface | JTAG / Altera serial | Passive Serial, Passive Parallel, Passive Asynchronous, JTAG (IEEE 1149.1) |
| Design Toolchain | Quartus II (legacy version 4.x or earlier recommended) | — |
| Maximum System Gates | — | 1,600,000 |
| Typical Gates | — | 40,000 |
| Logic Elements | — | [DATA_NEEDED: exact LE count] |
| Embedded System Bits | — | 655,360 bits |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Number of PLLs | — | 4 |
| Core Supply Voltage | — | 1.8 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| 封装 | — | FBGA-1020 |
| In-System Programmability | — | Yes |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |