EP2A40F1020C8 vs EP2A40F1020C7N 对比

详细并排对比 EP2A40F1020C8 出自 Intel 和 EP2A40F1020C7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A40F1020C8 EP2A40F1020C7N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $310.00 $198.00
Family APEX II APEX II
Logic Family CMOS CMOS
Process Technology 0.15 µm all-layer copper, up to 8 metal layers —
System Gates 1,500,000 1,500,000 (1.5 M)
Logic Cells 38,400 —
Macros / Macro Cells 2,560 —
Embedded RAM [DATA_NEEDED: total ESB bits] —
Maximum Internal Frequency 376 MHz —
Propagation Delay 1.55 ns 1.55 ns
User I/O Pins 735 735
Core Voltage (VCCINT) 1.5 V —
I/O Voltage (VCCIO) MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V —
Package Type FC-FBGA (FineLine BGA) —
Package Pin Count 1020 —
Package Dimensions 33 x 33 mm —
Ball Pitch 1.0 mm —
工作温度 0 C to +85 C (commercial, 'C' suffix) 0 °C to +85 °C (commercial, C7 grade)
RoHS 状态 [DATA_NEEDED: confirm per lot] —
Configuration Interface JTAG / Altera serial —
Design Toolchain Quartus II (legacy version 4.x or earlier recommended) —
Technology — 0.15 µm all-layer copper CMOS, up to 8 metal layers
Logic Elements — 38,400
Embedded Memory — ESB-based, 504 Kbits total
Maximum Internal Performance — 562 MHz
PLLs — 4
Clock Networks — 12
True-LVDS Data Rate — 1 Gbps
Supported I/O Standards — True-LVDS, LVPECL, PCML, HyperTransport, LVTTL, LVCMOS, PCI, SSTL
Core Supply Voltage — 1.5 V nominal (1.425 V – 1.575 V)
封装 — FC-FBGA-1020, 33 × 33 mm, 1.0 mm pitch, fine-line
Terminal Form — BGA ball (flip-chip)
安装类型 — Surface Mount

数据手册与资源

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