EP2A40F1020C9 vs EP2A40F1020I7N 对比

详细并排对比 EP2A40F1020C9 出自 Intel 和 EP2A40F1020I7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A40F1020C9 EP2A40F1020I7N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $160.00 $142.00
Family APEX II APEX II
Logic Elements / Cells 38,400 —
System Gates 1,500,000 (1.5M) 1,500,000
Macrocells 2,560 —
User I/Os 735 —
封装 1020-pin FC-FBGA (FineLine BGA), 33 x 33 mm, 1 mm pitch 1020-pin FC-FBGA
Process Technology 0.15-µm CMOS, up to 8-layer all-layer copper metal 0.15 µm
Core Voltage 1.5 V 1.5 V
Maximum Internal Frequency 366 MHz —
Propagation Delay 1.55 ns —
Logic Family CMOS —
工作温度 0°C to 85°C (Commercial) -40C to +100C (Industrial)
安装类型 Surface Mount (BGA) Surface Mount
I/O Standards Supported LVTTL, LVCMOS, PCI 32/64-bit, PCI-X 133 MHz, AGP, CTT, SSTL-2 / SSTL-3 Class I & II, GTL+, HSTL Class I & II —
Embedded Memory ESBs (Embedded System Blocks) supporting dual-port RAM, CAM, and product-term logic [DATA_NEEDED: total embedded memory bits]
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Device Logic Elements — 38,400 cells
Maximum Operating Frequency — 562 MHz
Speed Grade — I7
Architecture — PLA-type / Look-up Table hybrid
Number of PLLs — [DATA_NEEDED: PLL count]
User I/O Pins — [DATA_NEEDED: user I/O pin count]
Design Software — Quartus II

数据手册与资源

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