EP2A40F1020I7N vs EP2A40F1020I9N 对比

详细并排对比 EP2A40F1020I7N 出自 Intel 和 EP2A40F1020I9N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A40F1020I7N EP2A40F1020I9N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $142.00 $165.00
Family APEX II APEX II
Device Logic Elements 38,400 cells —
System Gates 1,500,000 1,500,000 (1.5 M)
Maximum Operating Frequency 562 MHz 366 MHz
Process Technology 0.15 µm 0.15 um CMOS, up to 8 metal layers
Core Voltage 1.5 V —
封装 1020-pin FC-FBGA 1020-pin FC-FBGA (Flip-Chip FineLine BGA)
工作温度 -40C to +100C (Industrial) —
Speed Grade I7 —
安装类型 Surface Mount Surface Mount (BGA)
Architecture PLA-type / Look-up Table hybrid —
Number of PLLs [DATA_NEEDED: PLL count] —
Embedded Memory [DATA_NEEDED: total embedded memory bits] ESB-based True-Dual-Port/Single-Port RAM, ROM, CAM (bits [DATA_NEEDED: total RAM bits])
User I/O Pins [DATA_NEEDED: user I/O pin count] —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Design Software Quartus II —
Device Logic Elements / Cells — 38,400 cells
Core Supply Voltage — 1.5 V
User I/O Count — 735 bidirectional I/O
Operating Temperature Grade — Industrial (I9 suffix: -40C to +100C per Altera APEX II convention)
High-Speed I/O Standards — True-LVDS (up to 1 Gbps), LVPECL, PCML, HyperTransport
Clock Management — PLLs (count [DATA_NEEDED: PLL count])
Configuration Modes — Passive Serial, Passive Parallel Asynchronous/Synchronous, JTAG
生命周期状态 — Obsolete (per distributor listings / Altera APEX II family EOL)

数据手册与资源

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