EP2A40F672C8N vs EP2A40F672C9ES 对比

详细并排对比 EP2A40F672C8N 出自 Intel 和 EP2A40F672C9ES 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A40F672C8N EP2A40F672C9ES
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $122.00 $195.00
Family APEX II APEX II
Series EP2A40 —
Logic Family CMOS —
System Gates 1.5 M 1,500,000
Logic Elements / Cells 38,400 —
Maximum Operating Frequency 376 MHz —
Propagation Delay 1.55 ns —
Technology Node 0.15 µm —
Process Feature All-layer copper, up to 8 metal layers —
Nominal Supply Voltage (VCCINT) 1.5 V —
Supply Voltage Range 1.425 V to 1.575 V —
User I/Os 492 —
Number of Pins / Balls 672 —
Package Type FC-FBGA (FineLine BGA) —
Package Dimensions 27 x 27 mm —
Ball Pitch 1.0 mm —
LVDS Data Rate 1 Gbps —
Embedded PLLs 4 —
Programming Interface JTAG (IEEE 1149.1) —
Operating Temperature (Commercial) 0 °C to 85 °C —
Speed Grade C8 -9
RoHS 状态 [DATA_NEEDED: RoHS status] unknown
Logic Elements — 38,400
Maximum User I/O — 492
Operating Frequency (max) — 366 MHz
Process Technology — 0.15 µm CMOS
Core Voltage — 1.5 V
封装 — 672-pin FC-FBGA
安装类型 — Surface Mount (BGA)
Configuration Modes — PS, PPS, PPA, JTAG, FPP
Embedded Memory (ESB) — Yes (RAM/ROM/CAM)
I/O Standards — LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+
Boundary Scan — IEEE 1149.1 (JTAG)

数据手册与资源

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