EP2A40F672C8N vs EP2A40F672I7 对比
详细并排对比 EP2A40F672C8N 出自 Intel 和 EP2A40F672I7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A40F672C8N | EP2A40F672I7 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $122.00 | $185.00 |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Logic Family | CMOS | — |
| System Gates | 1.5 M | — |
| Logic Elements / Cells | 38,400 | — |
| Maximum Operating Frequency | 376 MHz | — |
| Propagation Delay | 1.55 ns | — |
| Technology Node | 0.15 µm | — |
| Process Feature | All-layer copper, up to 8 metal layers | — |
| Nominal Supply Voltage (VCCINT) | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| User I/Os | 492 | — |
| Number of Pins / Balls | 672 | — |
| Package Type | FC-FBGA (FineLine BGA) | — |
| Package Dimensions | 27 x 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| LVDS Data Rate | 1 Gbps | — |
| Embedded PLLs | 4 | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Operating Temperature (Commercial) | 0 °C to 85 °C | — |
| Speed Grade | C8 | -7 (speed grade 7) |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | unknown |
| Logic Elements | — | 38,400 |
| Maximum System Gates | — | 1,500,000 |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O pins for F672 package] |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO supported levels] |
| Process Technology | — | 0.15 µm CMOS |
| Core Frequency (max) | — | 562 MHz |
| 工作温度 | — | -40 °C to +85 °C (Industrial) |
| 封装 | — | 672-ball FC-FBGA |
| Package Family | — | Fine-pitch Chip-scale BGA |
| 安装类型 | — | Surface Mount |
| 湿敏等级（MSL） | — | 3 |
| Peak Reflow Temperature | — | 220 °C |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |