EP2A40F672C9ES vs EP2A40F672C6 对比
详细并排对比 EP2A40F672C9ES 出自 Altera 和 EP2A40F672C6 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A40F672C9ES | EP2A40F672C6 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $195.00 | $105.00 |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | — |
| System Gates | 1,500,000 | — |
| Maximum User I/O | 492 | — |
| Operating Frequency (max) | 366 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.18-micron CMOS |
| Core Voltage | 1.5 V | — |
| 封装 | 672-pin FC-FBGA | 672-ball FineLine BGA (FBGA-672) |
| 安装类型 | Surface Mount (BGA) | Surface Mount (BGA) |
| Speed Grade | -9 | C6 (commercial) |
| Configuration Modes | PS, PPS, PPA, JTAG, FPP | — |
| Embedded Memory (ESB) | Yes (RAM/ROM/CAM) | — |
| I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| RoHS 状态 | unknown | [DATA_NEEDED: RoHS status] |
| Device | — | EP2A40 |
| Logic Elements (typical) | — | 40,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gates] |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: ESB count] |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O count] |
| 工作温度 | — | Commercial (0C to +85C) |
| Configuration Memory | — | SRAM-based |
| JTAG Support | — | Yes (IEEE 1149.1) |
| PLL Support | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Lifecycle | — | Obsolete / EOL (per Intel/Altera product discontinuation notice) |