EP2A40F672I7 vs EP2A40F672C7N 对比

详细并排对比 EP2A40F672I7 出自 Altera 和 EP2A40F672C7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A40F672I7 EP2A40F672C7N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $185.00 $198.00
Family APEX II APEX II
Logic Elements 38,400 —
Maximum System Gates 1,500,000 —
Maximum User I/O [DATA_NEEDED: max user I/O pins for F672 package] —
Core Voltage (VCCINT) 1.5 V —
I/O Voltage (VCCIO) [DATA_NEEDED: VCCIO supported levels] —
Process Technology 0.15 µm CMOS 0.15 µm CMOS, all-layer copper, up to 8 metal layers
Core Frequency (max) 562 MHz —
工作温度 -40 °C to +85 °C (Industrial) 0 °C to 85 °C (commercial, 'C' grade)
封装 672-ball FC-FBGA 672-ball FC-FBGA (FineLine BGA), S-PBGA-B672, 27 x 27 mm, 1.0 mm pitch
Package Family Fine-pitch Chip-scale BGA —
安装类型 Surface Mount Surface Mount
Speed Grade -7 (speed grade 7) 7
湿敏等级(MSL) 3 —
Peak Reflow Temperature 220 °C —
Configuration Method JTAG / Passive Serial / Active Serial —
RoHS 状态 unknown —
Logic Elements / Cells — 38,400
System Gates — 1.5 M
Maximum User I/Os — 492
Propagation Delay (tpd) — 1.55 ns
Internal Performance — 562 MHz
Core Voltage — 1.5 V
MultiVolt I/O Support — 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V
Logic Family — CMOS
Lead-Free / RoHS — Yes (N suffix)
Configuration Modes — Passive Serial, Passive Parallel, JTAG

数据手册与资源

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