EP2A70B724C9 vs EP2A70B724C7 对比

详细并排对比 EP2A70B724C9 出自 Altera 和 EP2A70B724C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2A70B724C9 EP2A70B724C7
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Unknown
库存状态 有库存 有库存
单价(USD) $998.27 $0.00
Family APEX II APEX II
Logic Elements 67200 —
Embedded Memory (bits) 1146880 —
User I/O Count 540 —
封装 724-BBGA, FCBGA (FineLine BGA) 724-pin FCBGA, 724-BBGA, or PBGA724
Process Technology 0.15 um all-layer copper (up to 8 metal layers) —
LVDS Channels Up to 8 LVDS pairs at 1 Gbps —
I/O Standards Supported True-LVDS, LVPECL, PCML, HyperTransport —
Embedded Memory Type ESB (synchronous, self-timed WE, true dual-port / simple dual-port / single-port) —
PLLs Up to 4 —
Speed Grade C9 (commercial, speed bin 9) —
工作温度 0C to +85C (commercial) [DATA_NEEDED: operating-temperature range]
Supply Voltage (core) 1.5 V —
安装类型 Surface Mount (BGA) —
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 Non-compliant (per IC-Components listing) unknown
Device Type — FPGA (Field Programmable Gate Array)
Gate Count — 3,000,000 gates
Logic Cells — 67,200 cells
I/O Count — 540 I/O
Configuration or Memory Capacity — [DATA_NEEDED: exact embedded-memory or configuration-memory capacity]
电源电压 — 1.5 V
Maximum Frequency — 420 MHz
Fabrication Process — 0.15 µm
Loadable PLD Timing — 2.17 ns
Technology — CMOS
Package Body Size — 35 mm x 35 mm
Package Pitch — 1.27 mm
Interface Capabilities — True-LVDS, LVPECL, PCML, and HyperTransport
REACH Status — unknown
AEC-Q100 Status — unknown
Lead-Free Status — unknown

数据手册与资源

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