EP2A70F1020C9 vs EP2A40F1020C8 对比
详细并排对比 EP2A70F1020C9 出自 Intel 和 EP2A40F1020C8 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2A70F1020C9 | EP2A40F1020C8 |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $132.80 | $310.00 |
| Family | APEX II (APII) | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Typical Gates | ~70,000 gates | — |
| 封装 | 1020-ball FBGA (FineLine BGA) | — |
| User I/O Pins | 735 | 735 |
| Speed Grade | -9 (fastest) | — |
| Operating Temperature Grade | Commercial (C) | — |
| Configuration Method | JTAG / passive serial / passive parallel | — |
| Core Voltage (VCCINT) | [DATA_NEEDED: VCCINT nominal value] | 1.5 V |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO nominal value] | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| On-chip Memory | EABs (Embedded Array Blocks) | — |
| Embedded Multipliers | Yes (DSP blocks in LABs) | — |
| 安装类型 | Surface Mount | — |
| MSL 等级 | 3 (JEDEC J-STD-020) | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: confirm per lot] |
| Logic Family | — | CMOS |
| Process Technology | — | 0.15 µm all-layer copper, up to 8 metal layers |
| System Gates | — | 1,500,000 |
| Logic Cells | — | 38,400 |
| Macros / Macro Cells | — | 2,560 |
| Embedded RAM | — | [DATA_NEEDED: total ESB bits] |
| Maximum Internal Frequency | — | 376 MHz |
| Propagation Delay | — | 1.55 ns |
| Package Type | — | FC-FBGA (FineLine BGA) |
| Package Pin Count | — | 1020 |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.0 mm |
| 工作温度 | — | 0 C to +85 C (commercial, 'C' suffix) |
| Configuration Interface | — | JTAG / Altera serial |
| Design Toolchain | — | Quartus II (legacy version 4.x or earlier recommended) |