EP2AGZ225FF35I3N vs EP2AGZ225FF35C3G 对比
详细并排对比 EP2AGZ225FF35I3N 出自 Intel 和 EP2AGZ225FF35C3G 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2AGZ225FF35I3N | EP2AGZ225FF35C3G |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $2,655.00 | $868.40 |
| Family | Arria II GZ | Arria II GZ |
| Logic Elements (LE) | 224,000 | 225,000 |
| Embedded Memory | 14,248,960 bits (approx. 14.25 Mbit) | [DATA_NEEDED: Mbits] |
| Logic Array Blocks (LABs) | 8,960 | — |
| User I/O Count | 554 | — |
| Maximum Transceiver Data Rate | 6.375 Gbps | — |
| Transceiver Channels | 24 | — |
| Process Technology | 40 nm | 40 nm TSMC |
| Core Voltage | 0.9 V | — |
| 工作温度 | -40C to +100C (Industrial) | 0C to +85C (Commercial) |
| 封装 | 1152-ball FC-FBGA | 1152-ball Flip-Chip BGA (FF35) |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| MSL 等级 | [DATA_NEEDED: MSL rating] | 3 (per JEDEC J-STD-020) |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | Compliant |
| Configuration Method | SRAM-based (volatile, requires external config device) | — |
| Maximum User I/O | 554 | [DATA_NEEDED: pin count] |
| Series | — | Arria II |
| Package Size | — | 35 mm x 35 mm |
| Speed Grade | — | C3 |
| Transceivers | — | Up to 16 channels |
| Transceiver Data Rate (max) | — | 6.375 Gbps |
| DSP Blocks | — | [DATA_NEEDED: count] |
| User I/O Banks | — | [DATA_NEEDED: count] |
| Memory Controller Support | — | DDR3, DDR2, QDR II+ |
| PCI Express Hard IP | — | Yes (Gen1/Gen2) |
| Lead-Free | — | Yes |