EP2AGZ300FF35C4G vs EP2AGZ300FF35C3G 对比
详细并排对比 EP2AGZ300FF35C4G 出自 Intel 和 EP2AGZ300FF35C3G 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2AGZ300FF35C4G | EP2AGZ300FF35C3G |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 有效 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $2,240.00 | $1,395.00 |
| Family | Arria II GZ | — |
| Logic Elements | 300,000 | 300,000 |
| Adaptive Logic Modules (ALMs) | 119,000 | 119,088 |
| Embedded Memory | 16,624 Kbit (M9K + M144K) | 17,133 Kbit |
| Embedded 18x18 Multipliers | 736 | — |
| User I/O Pins | 554 | — |
| Transceivers | 12 channels | 16 channels, up to 6.375 Gbps |
| Max Transceiver Data Rate | 6.375 Gbps (C4 speed grade) | — |
| 封装 | 1152-ball FineLine BGA (FBGA-1152), 35x35 mm | FCBGA-1152 (35 mm) |
| 工作温度 | 0°C to +85°C (commercial C4 grade) | — |
| Speed Grade | 4 | 3 (mid-performance) |
| Process Technology | 40 nm TSMC | 40 nm TSMC |
| Core Voltage | 0.85 V to 1.1 V | — |
| PLLs | 8 (up to 4 per quadrant) | — |
| Global Clock Networks | 16 | — |
| PCIe Hard IP | PCIe Gen2 x4 | — |
| Hard Memory Controller | DDR3 up to 800 MHz | DDR3 up to 800 MHz, DDR2, QDR II+ |
| Configuration | Passive Serial, Fast Passive Parallel, JTAG | — |
| RoHS 状态 | Compliant | Compliant |
| MSL 等级 | 3 (168 hours) | — |
| Series | — | Arria II GZ |
| DSP Blocks | — | 16-bit x 18-bit x 18-bit multipliers, integer/fractional modes |
| Hard PCIe Controllers | — | Up to 12 (Gen2 endpoint/root-port) |
| User I/Os | — | 1,288 |
| I/O Banks | — | 12 |
| Package Family | — | BGA (Flip-Chip) |
| Temperature Grade | — | Commercial (0 C to 85 C junction) |
| Configuration Method | — | Quartus II/Prime, JTAG, Passive Serial, Fast Passive Parallel |