EP2C35U484C7 vs EP2C35F484C7 对比

详细并排对比 EP2C35U484C7 出自 Altera 和 EP2C35F484C7 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2C35U484C7 EP2C35F484C7
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 有效
库存状态 有库存 有库存
单价(USD) $108.50 $54.25
Family Cyclone II —
Logic Elements (LE) 33,216 —
Total RAM Bits 483,840 bits —
User I/O Count 322 —
Number of Logic Blocks / Logic Cells 2,076 (per digchip listing) —
Embedded Multipliers (18x18) 35 35
PLLs 4 —
Process Technology 90 nm CMOS 90 nm CMOS, 1.2 V core
Core Supply Voltage 1.2 V —
工作温度 0 C to +85 C (commercial 'C' grade) 0 C to 85 C (Commercial)
Internal Frequency (max) 402.58 MHz —
Logic Family CMOS —
封装 484-FBGA (FineLine BGA, UBGA-484) 484-pin FBGA (FineLine BGA)
安装类型 Surface Mount Surface Mount
RoHS 状态 Lead-free / Compliant per Altera product page —
Speed Grade 7 (fastest commercial for this device) —
I/O Standards Supported LVDS, LVTTL, LVCMOS, SSTL, PCI —
PCI Support PCI 32/64-bit @ 33/66 MHz; PCI-X 133 MHz (with PHY) —
Series — Cyclone II
Manufacturer — Intel (formerly Altera)
Logic Elements — 33,216 LE
Total Memory Bits — 483,840 bits
Number of Logic Array Blocks (LABs) — [DATA_NEEDED: LAB count]
Maximum User I/O — 322
Number of PLLs — 4
Global Clock Networks — 16
Core Voltage — 1.2 V
Configuration Modes — JTAG, Passive Serial (PS), Active Serial (AS)
I/O Standards — LVDS, LVTTL, LVCMOS, SSTL, HSTL
External Memory Support — DDR, DDR2, QDRII SRAM
Lead-Free / RoHS — Lead-Free (per 'N' suffix not present; C7 = commercial temp)

数据手册与资源

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