EP2C70F672C6 vs EP2C50F672C7 对比
详细并排对比 EP2C70F672C6 出自 Altera 和 EP2C50F672C7 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2C70F672C6 | EP2C50F672C7 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 最后采购期 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $338.91 | $184.59 |
| Family | Cyclone II | Cyclone II |
| Process Technology | 90 nm CMOS | 90 nm CMOS with low-k dielectric |
| Logic Elements | 68,416 | — |
| Configurable Logic Blocks (CLBs) | 4,276 | — |
| Maximum User I/O | 422 | — |
| Embedded Memory | 1,152,000 bits (~1.1 Mbit) | — |
| Embedded Memory Blocks | M9K blocks | 250 M4K blocks (4 Kbit each) |
| PLLs | 4 | — |
| Core Voltage | 1.2 V | — |
| Maximum Internal Frequency | 500 MHz | — |
| Speed Grade | C6 | -7 |
| 封装 | 672-ball FBGA (F672) | 672-ball FineLine BGA (FBGA-672) |
| 安装类型 | Surface Mount (BGA) | — |
| Operating Temperature Grade | Commercial (0C to +85C) | — |
| External Memory Interface Support | DDR, DDR2, SDR, QDRII SRAM | — |
| RoHS 状态 | Unknown - requires confirmation from manufacturer | — |
| Logic Elements (LE) | — | 50,528 |
| Embedded Memory Bits | — | 594,432 bits |
| Embedded 18x18 Multipliers | — | 86 (150 per device family datasheet figure) |
| User I/O Pins | — | 450 |
| Phase-Locked Loops (PLL) | — | 4 |
| Global Clock Networks | — | 16 |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V (per bank) |
| Temperature Grade | — | Commercial (0C to +85C junction) |
| Configuration Modes | — | Passive Serial (PS), Active Serial (AS), JTAG |
| Lead-Free / RoHS | — | Lead-Free / RoHS compliant per Heisener listing |