EP2S30F672C3 vs EP2S30F672C5N 对比

详细并排对比 EP2S30F672C3 出自 Intel 和 EP2S30F672C5N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S30F672C3 EP2S30F672C5N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $780.00 $450.00
Series Stratix II Stratix II
Number of Logic Elements 33,880 —
Number of Adaptive Logic Modules (ALMs) 13,560 —
Total Embedded Memory Bits 1,369,728 —
Embedded Memory (M512 / M4K / M-RAM blocks) M512, M4K, M-RAM TriMatrix —
Total RAM Bits 1,369,728 —
Number of User I/O 500 —
Number of Transceivers [DATA_NEEDED: depends on variant - up to 12] —
DSP Blocks Dedicated 18x18 multipliers [DATA_NEEDED: DSP block count]
DSP Performance Up to 156 GMACs —
Voltage - Supply 1.2 V core, multi-rail I/O —
工作温度 0C to +85C (Commercial) —
Speed Grade -3 C5 (-5 commercial)
封装 / 外壳 672-BBGA, FCBGA (FineLine BGA) —
安装类型 Surface Mount —
Process Technology 90 nm CMOS 90 nm CMOS
RoHS 状态 Non-compliant (leaded BGA) —
MSL 等级 [DATA_NEEDED: MSL rating] —
Family Name — Stratix II
Logic Elements — 33,880
Embedded Memory (bits) — 1,369,728
Logic Array Blocks (LABs) — 1694
User I/O Count — 500
封装 — 672-ball FBGA (FineLine BGA)
Supply Voltage (Core) — [DATA_NEEDED: core VCC value]
工作温度范围 — Commercial (0C to +85C)
Number of PLLs — 4
Global Clock Networks — 16
Configuration Method — Serial / Passive Parallel / Fast Passive Parallel
Lead-Free / RoHS — Yes (N suffix)
Architecture — Adaptive Logic Module (ALM)
Multipliers — [DATA_NEEDED: 18x18 multiplier count]

数据手册与资源

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