EP2S30F672C4 vs EP2S30F672C4N 对比

详细并排对比 EP2S30F672C4 出自 Intel 和 EP2S30F672C4N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S30F672C4 EP2S30F672C4N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $498.43 $121.00
Manufacturer Intel (formerly Altera) —
Series Stratix II Stratix II
Logic Elements / Cells 33,880 —
Total RAM Bits 1,369,728 1,369,728
Number of I/O 500 500
封装 672-BBGA, FCBGA (27x27 mm) 672-BBGA, FCBGA (FineLine BGA)
安装类型 Surface Mount Surface Mount
Core Voltage - Supply 1.15 V to 1.25 V —
Process Technology 90 nm 90 nm CMOS
Maximum Core Frequency (datasheet benchmark) 711 MHz —
工作温度 0C to +85C (commercial, 'C' speed grade) 0C to +85C (Commercial, C4 grade)
Embedded DSP Blocks 16 (Stratix II S30 tier) —
Number of PLLs [DATA_NEEDED: PLL count for S30 tier] —
Number of Global Clock Networks [DATA_NEEDED: global clock network count] —
RoHS 状态 Compliant [DATA_NEEDED: rohs status]
Lead-Free Yes —
Logic Elements — 33,880
Number of LABs/CLBs — 1694
Core Voltage — 1.2 V
Maximum Internal Frequency — 711.24 MHz
Speed Grade — C4 (Commercial, internal performance bin 4)
MSL 等级 — 3 (168 hours)
Lead-Free / Halogen-Free — [DATA_NEEDED: lead-free / halogen-free status]
Embedded Multipliers / DSP Blocks — [DATA_NEEDED: DSP block count]
Transceivers — N/A (Stratix II non-GX variant)
Configuration Method — Passive serial / Fast passive parallel / JTAG

数据手册与资源

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