EP2S30F672C4N vs EP2S30F672C4 对比

详细并排对比 EP2S30F672C4N 出自 Altera 和 EP2S30F672C4 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S30F672C4N EP2S30F672C4
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $121.00 $498.43
Series Stratix II Stratix II
Logic Elements 33,880 —
Total RAM Bits 1,369,728 1,369,728
Number of LABs/CLBs 1694 —
Number of I/O 500 500
封装 672-BBGA, FCBGA (FineLine BGA) 672-BBGA, FCBGA (27x27 mm)
安装类型 Surface Mount Surface Mount
工作温度 0C to +85C (Commercial, C4 grade) 0C to +85C (commercial, 'C' speed grade)
Core Voltage 1.2 V —
Process Technology 90 nm CMOS 90 nm
Maximum Internal Frequency 711.24 MHz —
Speed Grade C4 (Commercial, internal performance bin 4) —
MSL 等级 3 (168 hours) —
RoHS 状态 [DATA_NEEDED: rohs status] Compliant
Lead-Free / Halogen-Free [DATA_NEEDED: lead-free / halogen-free status] —
Embedded Multipliers / DSP Blocks [DATA_NEEDED: DSP block count] —
Transceivers N/A (Stratix II non-GX variant) —
Configuration Method Passive serial / Fast passive parallel / JTAG —
Manufacturer — Intel (formerly Altera)
Logic Elements / Cells — 33,880
Core Voltage - Supply — 1.15 V to 1.25 V
Maximum Core Frequency (datasheet benchmark) — 711 MHz
Embedded DSP Blocks — 16 (Stratix II S30 tier)
Number of PLLs — [DATA_NEEDED: PLL count for S30 tier]
Number of Global Clock Networks — [DATA_NEEDED: global clock network count]
Lead-Free — Yes

数据手册与资源

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