EP2S30F672C4N vs EP2S30F672C5 对比
详细并排对比 EP2S30F672C4N 出自 Altera 和 EP2S30F672C5 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S30F672C4N | EP2S30F672C5 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $121.00 | $155.00 |
| Series | Stratix II | — |
| Logic Elements | 33,880 | 33,880 |
| Total RAM Bits | 1,369,728 | 1,369,728 |
| Number of LABs/CLBs | 1694 | — |
| Number of I/O | 500 | — |
| 封装 | 672-BBGA, FCBGA (FineLine BGA) | 672-pin FC-FBGA (flip-chip) |
| 安装类型 | Surface Mount | Surface Mount (BGA) |
| 工作温度 | 0C to +85C (Commercial, C4 grade) | — |
| Core Voltage | 1.2 V | 1.2 V |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Maximum Internal Frequency | 711.24 MHz | — |
| Speed Grade | C4 (Commercial, internal performance bin 4) | C5 (moderate-speed bin) |
| MSL 等级 | 3 (168 hours) | — |
| RoHS 状态 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: confirmed RoHS compliance] |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free / halogen-free status] | — |
| Embedded Multipliers / DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Transceivers | N/A (Stratix II non-GX variant) | — |
| Configuration Method | Passive serial / Fast passive parallel / JTAG | — |
| Family | — | Stratix II |
| Logic Array Blocks (LABs) | — | 1,694 |
| Embedded Multipliers (DSP blocks) | — | 12 DSP blocks |
| Maximum User I/Os | — | 500 |
| Maximum Operating Frequency | — | 609.76 MHz |
| Operating Temperature (Commercial) | — | 0C to 85C junction |
| 存储器类型 | — | TriMatrix (M512 / M4K / M-RAM) |