EP2S30F672C5N vs EP2S30F672C4 对比

详细并排对比 EP2S30F672C5N 出自 Intel 和 EP2S30F672C4 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S30F672C5N EP2S30F672C4
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $450.00 $498.43
Series Stratix II Stratix II
Family Name Stratix II —
Logic Elements 33,880 —
Embedded Memory (bits) 1,369,728 —
Logic Array Blocks (LABs) 1694 —
User I/O Count 500 —
封装 672-ball FBGA (FineLine BGA) 672-BBGA, FCBGA (27x27 mm)
Speed Grade C5 (-5 commercial) —
Process Technology 90 nm CMOS 90 nm
Supply Voltage (Core) [DATA_NEEDED: core VCC value] —
工作温度范围 Commercial (0C to +85C) —
Number of PLLs 4 [DATA_NEEDED: PLL count for S30 tier]
Global Clock Networks 16 —
Configuration Method Serial / Passive Parallel / Fast Passive Parallel —
Lead-Free / RoHS Yes (N suffix) —
Architecture Adaptive Logic Module (ALM) —
DSP Blocks [DATA_NEEDED: DSP block count] —
Multipliers [DATA_NEEDED: 18x18 multiplier count] —
Manufacturer — Intel (formerly Altera)
Logic Elements / Cells — 33,880
Total RAM Bits — 1,369,728
Number of I/O — 500
安装类型 — Surface Mount
Core Voltage - Supply — 1.15 V to 1.25 V
Maximum Core Frequency (datasheet benchmark) — 711 MHz
工作温度 — 0C to +85C (commercial, 'C' speed grade)
Embedded DSP Blocks — 16 (Stratix II S30 tier)
Number of Global Clock Networks — [DATA_NEEDED: global clock network count]
RoHS 状态 — Compliant
Lead-Free — Yes

数据手册与资源

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