EP2S30F672I4N vs EP2S30F672C4N 对比
详细并排对比 EP2S30F672I4N 出自 Altera 和 EP2S30F672C4N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S30F672I4N | EP2S30F672C4N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $145.00 | $121.00 |
| Family | Stratix II | — |
| Logic Elements (LEs) | 33,880 | — |
| Logic Array Blocks (LABs) | 1,694 | — |
| Total RAM Bits | 1,369,728 | 1,369,728 |
| Maximum User I/Os | 500 | — |
| 封装 | 672-BBGA, FCBGA (27x27 mm) | 672-BBGA, FCBGA (FineLine BGA) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | -40C to +100C (industrial) | 0C to +85C (Commercial, C4 grade) |
| Core Supply Voltage | 1.15 V to 1.25 V | — |
| Technology Node | 90 nm | — |
| Speed Grade | I4 (speed grade 4, industrial) | C4 (Commercial, internal performance bin 4) |
| 电源电压 | 1.15 V to 1.25 V | — |
| Maximum Frequency | 711.24 MHz | — |
| MSL 等级 | 3 (per JEDEC J-STD-020) | 3 (168 hours) |
| RoHS 状态 | Compliant | [DATA_NEEDED: rohs status] |
| Series | — | Stratix II |
| Logic Elements | — | 33,880 |
| Number of LABs/CLBs | — | 1694 |
| Number of I/O | — | 500 |
| Core Voltage | — | 1.2 V |
| Process Technology | — | 90 nm CMOS |
| Maximum Internal Frequency | — | 711.24 MHz |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free / halogen-free status] |
| Embedded Multipliers / DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceivers | — | N/A (Stratix II non-GX variant) |
| Configuration Method | — | Passive serial / Fast passive parallel / JTAG |