EP2S60F1020C3N vs EP2S60F1020I4 对比

详细并排对比 EP2S60F1020C3N 出自 Intel 和 EP2S60F1020I4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S60F1020C3N EP2S60F1020I4
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $1,095.00 $1,454.92
Family Stratix II —
Logic Elements (LE) 60,440 —
Logic Array Blocks (LABs) 3,022 —
Embedded Memory (bits) 2,544,192 2,544,192
Embedded Multipliers (18x18) 36 36
PLLs 12 —
Maximum User I/Os 718 —
Core Voltage 1.2 V —
Maximum Internal Frequency 717 MHz —
Speed Grade C3 (slowest commercial) —
工作温度 0C to +85C (commercial) —
封装 1020-ball FC-FBGA —
安装类型 Surface Mount Surface Mount
MSL 等级 [DATA_NEEDED: MSL level] —
RoHS 状态 Compliant Non-compliant (contains lead per legacy Altera package)
Lead-Free Yes —
Process Technology 90 nm 90 nm CMOS
Manufacturer — Intel / Altera
Series — Stratix II
Logic Elements (LEs) — 60,440
Number of LABs/CLBs — 3022
Number of CLBs — 24176
Maximum User I/O — 718
Number of I/O Banks — [DATA_NEEDED: number of I/O banks]
Operating Voltage (Core) — 1.2 V
Temperature Grade — Industrial (-40C to +100C TJ)
Package Type — 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
Package Dimensions — 33 mm x 33 mm
Ball Pitch — 1.0 mm
Configuration Method — Passive Serial / Fast Passive Parallel / JTAG
Number of PLLs — 12
Global Clock Networks — 16
Transceiver Count — 0 (no embedded transceivers)
Maximum Embedded Memory Bandwidth — [DATA_NEEDED: memory bandwidth spec]

数据手册与资源

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