EP2S60F1020C4N vs EP2S60F1020 对比

详细并排对比 EP2S60F1020C4N 出自 Intel 和 EP2S60F1020 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP2S60F1020 EP2S60F1020 - Stratix II FPGA, 60K LEs, 1020-BBGA | Altera

EP2S60F1020 - Stratix II FPGA, 60K LEs, 1020-BBGA | Altera

EP2S60F1020 ⚠ 最后一次采购

规格对比

参数 EP2S60F1020C4N EP2S60F1020
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $67.00 $1,495.00
Series Stratix II —
Family Stratix II (EP2S60) Stratix II
Logic Elements 60,440 —
Adaptive Logic Modules (ALMs) 30,220 (approx.) —
Logic Array Blocks (LABs) 3,022 —
Embedded Memory (bits) 2,544,192 —
Embedded Memory Blocks M512/M4K/M-RAM TriMatrix memory —
DSP Blocks (18-bit x 18-bit) Up to 48 (24 per DSP block column pair typical) —
User I/Os 718 —
Maximum Core Frequency 711.24 MHz (per Arrow listing) —
Core Voltage 1.2 V —
Process Technology 90 nm CMOS 90 nm
封装 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) 1020-BBGA (flip-chip BGA)
安装类型 Surface Mount (BGA) —
Operating Temperature Grade Commercial (C4 suffix indicates commercial, speed grade 4) —
Configuration Modes Passive Serial, Fast Passive Parallel, JTAG Passive Serial, Fast Passive Parallel, JTAG
PLLs / Clock Networks Yes - on-chip PLLs and global clock networks —
RoHS 状态 EU RoHS compliant with exemption (per Arrow listing) Compliant (lead-free variants available)
Logic Elements (LE) — 60,440
Adaptive Logic Modules (ALM) — 30,220
Total Embedded Memory Bits — 2,544,192 bits
Embedded Memory Type — TriMatrix (M512 / M4K / M-RAM)
DSP Blocks — 36 (18x18 multipliers)
Maximum User I/O — 718
Supply Voltage (Core) — 1.2 V
PLLs — 12 (4 enhanced + 8 fast)
Bitstream Encryption — 128-bit AES
Operating Temperature Grades — Commercial (C), Industrial (I)

数据手册与资源

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