EP2S60F1020C4N vs EP2S60F1020C5N 对比

详细并排对比 EP2S60F1020C4N 出自 Intel 和 EP2S60F1020C5N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EP2S60F1020C5N EP2S60F1020C5N - Stratix II FPGA 60K LE | Altera

EP2S60F1020C5N - Stratix II FPGA 60K LE | Altera

EP2S60F1020C5N ✓ 量产中

规格对比

参数 EP2S60F1020C4N EP2S60F1020C5N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 有效
库存状态 有库存 有库存
单价(USD) $67.00 $143.75
Series Stratix II Stratix II
Family Stratix II (EP2S60) —
Logic Elements 60,440 —
Adaptive Logic Modules (ALMs) 30,220 (approx.) —
Logic Array Blocks (LABs) 3,022 —
Embedded Memory (bits) 2,544,192 —
Embedded Memory Blocks M512/M4K/M-RAM TriMatrix memory —
DSP Blocks (18-bit x 18-bit) Up to 48 (24 per DSP block column pair typical) —
User I/Os 718 —
Maximum Core Frequency 711.24 MHz (per Arrow listing) —
Core Voltage 1.2 V —
Process Technology 90 nm CMOS —
封装 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) —
安装类型 Surface Mount (BGA) Surface Mount
Operating Temperature Grade Commercial (C4 suffix indicates commercial, speed grade 4) —
Configuration Modes Passive Serial, Fast Passive Parallel, JTAG —
PLLs / Clock Networks Yes - on-chip PLLs and global clock networks —
RoHS 状态 EU RoHS compliant with exemption (per Arrow listing) [DATA_NEEDED: RoHS status]
Number of Logic Elements — 60440
Number of LABs/CLBs — 3022
Number of Logic Array Blocks — 3022 LABs
Total RAM Bits — 2544192 bits
Number of User I/O — 718
封装 / 外壳 — 1020-BBGA, FCBGA
Number of Terminals — 1020
Terminal Form — BALL
Package Code — BGA
Package Shape — SQUARE
电源电压 — 1.15 V to 1.25 V
工作温度 — 0°C ~ 85°C (TJ)
Speed Grade / Order Code — C5 (commercial speed grade per Altera order code)
Moisture Sensitivity Level — [DATA_NEEDED: MSL]
Number of DSP Blocks — [DATA_NEEDED: Number of DSP blocks]
Number of M512 RAM Blocks — [DATA_NEEDED: Number of M512 RAM blocks]
Number of M4K RAM Blocks — [DATA_NEEDED: Number of M4K RAM blocks]

数据手册与资源

浏览全部产品 创建 BOM 获取报价