EP2S60F484C4 vs EP2S60F484C4N 对比

详细并排对比 EP2S60F484C4 出自 Altera 和 EP2S60F484C4N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S60F484C4 EP2S60F484C4N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $974.13 $920.00
Family Stratix II Stratix II FPGA
Logic Elements (LEs) 60,440 —
Adaptive Logic Modules (ALMs) 30,220 —
Logic Array Blocks (LABs) 3,022 —
Embedded Memory (bits) 2,544,192 —
Maximum User I/O 334 334
User I/O Banks [DATA_NEEDED: number of I/O banks] [DATA_NEEDED: User I/O Banks]
Process Technology 90 nm CMOS 90 nm CMOS
Core Voltage 1.2 V —
Speed Grade C4 (commercial, moderate speed) —
Maximum Internal Frequency 711.24 MHz (per third-party datasheet listing) —
封装 484-ball FBGA (FineLine BGA) 484-Ball FBGA (FineLine BGA)
安装类型 Surface Mount Surface Mount
工作温度 0C to +85C (commercial, C-grade) —
RoHS 状态 [DATA_NEEDED: RoHS status per official datasheet] [DATA_NEEDED: RoHS Status]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: Lead-Free]
Configuration Memory SRAM-based, volatile (requires external config device) —
Series — Stratix II
Logic Elements (LE) — 60,440
Adaptive Logic Modules (ALM) — 30,220
Embedded Memory (Bits) — 2,544,192
DSP Blocks (18x18 Multipliers) — 36
PLLs — Up to 12
Core Supply Voltage — 1.2 V
Maximum Internal Clock Frequency — 711.24 MHz
Operating Temperature Grade — Commercial (C4)
Configuration Modes — Passive Serial, Fast Passive Parallel, JTAG

数据手册与资源

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