EP2S60F484C5N vs EP2S60F484C4 对比

详细并排对比 EP2S60F484C5N 出自 Intel 和 EP2S60F484C4 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EP2S60F484C5N EP2S60F484C5N - 60K LE Stratix II FPGA, 484-FBGA | Intel

EP2S60F484C5N - 60K LE Stratix II FPGA, 484-FBGA | Intel

EP2S60F484C5N ⚠ 最后一次采购

规格对比

参数 EP2S60F484C5N EP2S60F484C4
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $720.50 $974.13
Family Stratix II Stratix II
Logic Elements 60,440 —
Adaptive Logic Modules (ALMs) 24,176 30,220
Embedded Memory Bits 2,544,192 bits —
Embedded RAM Blocks (TriMatrix) Yes —
DSP Blocks 36 —
18x18 Multipliers Up to 144 (max for family: 384) —
Maximum User I/O 334 334
Transceiver Blocks 12 (up to 6.375 Gbps) —
PLLs 12 (enhanced + fast) —
Core Voltage 1.2 V 1.2 V
I/O Standards LVTTL, LVCMOS, LVDS, LVPECL, PCI, PCI-X —
Speed Grade C5 (slowest) C4 (commercial, moderate speed)
Temperature Grade Commercial (0C to +85C junction) —
封装 484-ball FBGA (FineLine BGA) 484-ball FBGA (FineLine BGA)
Process Technology 90 nm CMOS 90 nm CMOS
RoHS 状态 Compliant (lead-free) [DATA_NEEDED: RoHS status per official datasheet]
Configuration Scheme SRAM-based, volatile (requires EPC16/EPC64 or JTAG) —
Logic Elements (LEs) — 60,440
Logic Array Blocks (LABs) — 3,022
Embedded Memory (bits) — 2,544,192
User I/O Banks — [DATA_NEEDED: number of I/O banks]
Maximum Internal Frequency — 711.24 MHz (per third-party datasheet listing)
安装类型 — Surface Mount
工作温度 — 0C to +85C (commercial, C-grade)
Lead-Free — [DATA_NEEDED: lead-free status]
Configuration Memory — SRAM-based, volatile (requires external config device)

数据手册与资源

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