EP2S60F672C3N vs EP2S60F672C3 对比

详细并排对比 EP2S60F672C3N 出自 Intel 和 EP2S60F672C3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S60F672C3N EP2S60F672C3
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $1,175.00 $1,033.14
Family Stratix II Stratix II
Logic Elements (LE) 60,440 —
Logic Array Blocks (LABs) 3,022 —
Adaptive Logic Modules (ALMs) 24,176 [DATA_NEEDED: ALM count]
Total Embedded Memory 2,544,192 bits (2.5 Mbits) —
User I/O Pins 492 —
User I/O Banks 8 —
Process Technology 90 nm CMOS 90 nm CMOS
Core Supply Voltage (VCCINT) 1.2 V —
I/O Supply Voltage (VCCIO) 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) —
Pre-Driver Supply (VCCPD) 3.3 V —
Maximum Internal Clock Frequency 816.99 MHz —
PLLs 4 4
Global Clock Networks 16 —
封装 672-pin FC-FBGA 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch
安装类型 Surface Mount Surface Mount
工作温度 0C to +85C (commercial grade) 0C to +85C (commercial)
Speed Grade C3 (slower speed grade) C3
RoHS 状态 unknown [DATA_NEEDED: RoHS status]
Lead-Free unknown —
Logic Elements — 60,440
Total RAM Bits — 2,544,192
Embedded Multiplier Blocks — [DATA_NEEDED: 9x9 multiplier count]
DSP Blocks — [DATA_NEEDED: DSP block count]
User I/Os — 492
Global Clocks — [DATA_NEEDED: global clock count]
Core Voltage — 1.2 V
Configuration Modes — PS, PPS, PPA, FPP, JTAG
MSL 等级 — [DATA_NEEDED: MSL level]

数据手册与资源

浏览全部产品 创建 BOM 获取报价