EP2S60F672C4N vs EP2S30F672C4N 对比
详细并排对比 EP2S60F672C4N 出自 Intel 和 EP2S30F672C4N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S60F672C4N | EP2S30F672C4N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $325.00 | $121.00 |
| Family | Stratix II | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Logic Elements (LE) | 60,440 | — |
| Adaptive Logic Modules (ALM) | 24,176 | — |
| Embedded Memory (bits) | 2,544,192 | — |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Maximum User I/O | 492 | — |
| Core Voltage | 1.2 V | 1.2 V |
| Maximum Fabric Clock | 711.24 MHz | — |
| 封装 | 672-pin FC-FBGA | 672-BBGA, FCBGA (FineLine BGA) |
| Package Type | FineLine Ball-Grid Array | — |
| Speed Grade | C4 (commercial) | C4 (Commercial, internal performance bin 4) |
| 工作温度 | 0C to +85C (commercial) | 0C to +85C (Commercial, C4 grade) |
| Configuration Method | JTAG, Fast Passive Parallel, Active Serial | Passive serial / Fast passive parallel / JTAG |
| 安装类型 | Surface Mount | Surface Mount |
| MSL 等级 | 3 | 3 (168 hours) |
| Lead-Free / RoHS | Yes (lead-free finish) | — |
| Series | — | Stratix II |
| Logic Elements | — | 33,880 |
| Total RAM Bits | — | 1,369,728 |
| Number of LABs/CLBs | — | 1694 |
| Number of I/O | — | 500 |
| Maximum Internal Frequency | — | 711.24 MHz |
| RoHS 状态 | — | [DATA_NEEDED: rohs status] |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free / halogen-free status] |
| Embedded Multipliers / DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Transceivers | — | N/A (Stratix II non-GX variant) |