EP2S60F672C4N vs EP2S60F672C3N 对比

详细并排对比 EP2S60F672C4N 出自 Intel 和 EP2S60F672C3N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2S60F672C4N EP2S60F672C3N
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $325.00 $1,175.00
Family Stratix II Stratix II
Process Technology 90 nm 90 nm CMOS
Logic Elements (LE) 60,440 60,440
Adaptive Logic Modules (ALM) 24,176 —
Embedded Memory (bits) 2,544,192 —
Embedded Multiplier Blocks [DATA_NEEDED: 9x9 multiplier count] —
DSP Blocks [DATA_NEEDED: DSP block count] —
Maximum User I/O 492 —
Core Voltage 1.2 V —
Maximum Fabric Clock 711.24 MHz —
封装 672-pin FC-FBGA 672-pin FC-FBGA
Package Type FineLine Ball-Grid Array —
Speed Grade C4 (commercial) C3 (slower speed grade)
工作温度 0C to +85C (commercial) 0C to +85C (commercial grade)
Configuration Method JTAG, Fast Passive Parallel, Active Serial —
安装类型 Surface Mount Surface Mount
MSL 等级 3 —
Lead-Free / RoHS Yes (lead-free finish) —
Logic Array Blocks (LABs) — 3,022
Adaptive Logic Modules (ALMs) — 24,176
Total Embedded Memory — 2,544,192 bits (2.5 Mbits)
User I/O Pins — 492
User I/O Banks — 8
Core Supply Voltage (VCCINT) — 1.2 V
I/O Supply Voltage (VCCIO) — 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent)
Pre-Driver Supply (VCCPD) — 3.3 V
Maximum Internal Clock Frequency — 816.99 MHz
PLLs — 4
Global Clock Networks — 16
RoHS 状态 — unknown
Lead-Free — unknown

数据手册与资源

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