EP2S60F672C5 vs EP2S60F672C4N 对比
详细并排对比 EP2S60F672C5 出自 Intel 和 EP2S60F672C4N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2S60F672C5 | EP2S60F672C4N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $410.85 | $325.00 |
| Family | Stratix II | Stratix II |
| Device Family | Stratix II FPGA | — |
| Logic Elements | 60,440 | — |
| Configurable Logic Blocks (CLBs) | 24,176 | — |
| Total RAM Bits | 2,544,192 bits | — |
| Maximum User I/Os | 492 | — |
| Operating Frequency | Up to 609.76 MHz | — |
| Core Voltage | 1.2 V | 1.2 V |
| Process Technology | 90 nm CMOS | 90 nm |
| 封装 | 672-ball FC-FBGA (35 × 35 mm, 1 mm pitch) | 672-pin FC-FBGA |
| 安装类型 | Surface Mount | Surface Mount |
| Operating Temperature Grade | Commercial (C5 suffix) | — |
| 工作温度范围 | 0°C to +85°C | — |
| Number of PLLs | 4 | — |
| DSP Blocks | 12 (dedicated 18 × 18 multipliers) | [DATA_NEEDED: DSP block count] |
| I/O Standards | LVDS, LVTTL, SSTL, HSTL, PCI-X | — |
| Configuration Scheme | Fast Passive Parallel, JTAG, Active Serial | — |
| RoHS 状态 | Non-RoHS (legacy product, pre-RoHS production runs) | — |
| Logic Elements (LE) | — | 60,440 |
| Adaptive Logic Modules (ALM) | — | 24,176 |
| Embedded Memory (bits) | — | 2,544,192 |
| Embedded Multiplier Blocks | — | [DATA_NEEDED: 9x9 multiplier count] |
| Maximum User I/O | — | 492 |
| Maximum Fabric Clock | — | 711.24 MHz |
| Package Type | — | FineLine Ball-Grid Array |
| Speed Grade | — | C4 (commercial) |
| 工作温度 | — | 0C to +85C (commercial) |
| Configuration Method | — | JTAG, Fast Passive Parallel, Active Serial |
| MSL 等级 | — | 3 |
| Lead-Free / RoHS | — | Yes (lead-free finish) |