EP2SGX130GF40C3NES vs EP2SGX130GF40C4ES 对比

详细并排对比 EP2SGX130GF40C3NES 出自 Altera 和 EP2SGX130GF40C4ES 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2SGX130GF40C3NES EP2SGX130GF40C4ES
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Unknown
库存状态 有库存 有库存
单价(USD) $124.00 $0.00
Family Stratix II GX —
Logic Elements 132540 —
Logic Array Blocks (LABs) 7047 —
Maximum Internal Frequency 778.82 MHz —
Process Technology 90 nm CMOS —
Core Voltage 1.2 V —
Transceiver Channels 4 to 20 (per device family configuration) —
Maximum Transceiver Data Rate 6.375 Gbps —
Transceiver Feature Embedded SERDES with Clock/Data Recovery (CRU) —
存储器类型 TriMatrix embedded memory (distributed RAM, block RAM, shift register) —
封装 1508-ball FC-FBGA (40 x 40 mm, 1 mm pitch) —
Operating Temperature Grade Commercial Extended —
Terminal Form Ball (BGA) —
安装类型 Surface Mount Surface mount
RoHS 状态 Lead-free compliant (per package code MS-034AAU-1) —
Series EP2SGX130 —
Product Type — Field-programmable gate array (FPGA)
Product Family — Stratix II GX
Logic Cells — 132,540
Configurable Logic Blocks — 7,047 CLBs
Logic Technology — CMOS
User I/O — 734 I/O
Internal Frequency — 717 MHz
Supply Voltage Range — 1.15 V to 1.25 V
Package Pin Count — 1,508 pins
Package Type — FBGA-1508
Package Body Size — 40 mm by 40 mm
Ball Pitch — 1 mm
Package Designation — MS-034AAU-1
Lead-Free — Yes
工作温度范围 — [DATA_NEEDED: operating temperature range]
Transceiver Count — [DATA_NEEDED: transceiver count]
Configuration Memory Type — [DATA_NEEDED: configuration memory type]

数据手册与资源

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