EP2SGX130GF40C3NES vs EP2SGX130GF40C4NGB 对比

详细并排对比 EP2SGX130GF40C3NES 出自 Altera 和 EP2SGX130GF40C4NGB 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2SGX130GF40C3NES EP2SGX130GF40C4NGB
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $124.00 $640.00
Family Stratix II GX Enhanced Configuration (EPC) Devices
Logic Elements 132540 132,540
Logic Array Blocks (LABs) 7047 6,627
Maximum Internal Frequency 778.82 MHz —
Process Technology 90 nm CMOS —
Core Voltage 1.2 V —
Transceiver Channels 4 to 20 (per device family configuration) —
Maximum Transceiver Data Rate 6.375 Gbps —
Transceiver Feature Embedded SERDES with Clock/Data Recovery (CRU) —
存储器类型 TriMatrix embedded memory (distributed RAM, block RAM, shift register) —
封装 1508-ball FC-FBGA (40 x 40 mm, 1 mm pitch) 1508-ball FBGA (GF40)
Operating Temperature Grade Commercial Extended —
Terminal Form Ball (BGA) —
安装类型 Surface Mount —
RoHS 状态 Lead-free compliant (per package code MS-034AAU-1) [DATA_NEEDED: RoHS status]
Series EP2SGX130 Stratix II GX
User I/O Pins — 734
Terminal Pitch — 1.00 mm
Speed Grade — C4
Temperature Grade — Commercial (0C to 85C)
Transceivers — Up to 20 multi-gigabit transceivers
Max Transceiver Data Rate — 6.375 Gbps
PLLs — 8
On-chip Memory — TriMatrix memory (block RAM + distributed RAM)
DSP Blocks — Yes (embedded multipliers)
Configuration — Enhanced / EPC mode

数据手册与资源

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