EP2SGX30DF780C4N vs EP2SGX30DF780C7N 对比
详细并排对比 EP2SGX30DF780C4N 出自 Altera 和 EP2SGX30DF780C7N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP2SGX30DF780C4N | EP2SGX30DF780C7N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $171.00 | $225.00 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements (LEs) | 33,880 | — |
| Logic Array Blocks (LABs) | 1,694 | — |
| Total RAM Bits | 1,369,728 | — |
| User I/O Pins | 361 | — |
| Maximum Internal Frequency | 622 MHz | — |
| Core Supply Voltage | 1.15 V to 1.25 V | — |
| Process Technology | 90 nm CMOS | 90 nm |
| 工作温度 | -40C to +85C | [DATA_NEEDED: temperature grade] |
| 封装 | 780-FBGA (29 x 29 mm, 1.0 mm pitch) | 780-ball FineLine BGA (DF) |
| 安装类型 | Surface Mount (flip-chip BGA) | Surface Mount |
| Lead-Free / RoHS | Lead-free (per FindIC datasheet) | — |
| Transceivers | [DATA_NEEDED: number of transceiver channels and per-channel data rate] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| PLLs | [DATA_NEEDED: PLL count] | [DATA_NEEDED: PLL count] |
| Configuration Method | SRAM (volatile, external flash required) | — |
| MSL 等级 | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Logic Elements | — | 33,880 |
| Embedded Memory (bits) | — | 1,369,728 |
| Total Block RAM (M512 + M4K + M-RAM) | — | 361 blocks |
| Maximum User I/O | — | 361 |
| Transceiver Data Rate | — | 3.125 Gbps |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| Embedded Multipliers (18x18) | — | [DATA_NEEDED: multiplier count] |
| Global Clocks | — | [DATA_NEEDED: global clock count] |
| Speed Grade | — | C7 (standard) |
| RoHS 状态 | — | Compliant (per Altera product family) |
| Supply Voltage (Core) | — | [DATA_NEEDED: Vcore value] |