EP2SGX60DF780C5N vs EP2SGX60DF780I3N 对比

详细并排对比 EP2SGX60DF780C5N 出自 Altera 和 EP2SGX60DF780I3N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP2SGX60DF780C5N EP2SGX60DF780I3N
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 不推荐新设计
库存状态 有库存 有库存
单价(USD) $205.00 $1,295.00
Family Stratix II GX Stratix II GX
Logic Elements 60,440 60,440
Number of LABs/CLBs 3,022 —
Embedded Memory (bits) 2,544,192 (≈2.5 Mb) —
User I/O Count 364 —
Number of Transceivers 12 —
Max Transceiver Data Rate 6.375 Gbps —
Internal Frequency (max) 609.76 MHz —
Process Technology 90 nm CMOS 90 nm CMOS
Core Supply Voltage 1.2 V —
Package Type 780-pin Flip-Chip BGA (FBGA-780) —
Operating Temperature Grade Commercial —
Speed Grade 5 (lower speed, higher Fmax margin) I3
安装类型 Surface Mount (BGA) Surface Mount
RoHS 状态 [DATA_NEEDED: confirm RoHS compliance from manufacturer product page] [DATA_NEEDED: per-lot RoHS confirmation]
Design Software Quartus II —
Series — EP2SGX60
Configurable Logic Blocks (CLBs) — 60,440
最大时钟频率 — 622.08 MHz
Nominal Core Supply Voltage — 1.2 V
封装 — 780-ball FC-FBGA (S-PBGA-B780)
Terminal Pitch — 1.00 mm
工作温度范围 — -40 °C to +85 °C (Industrial)
High-Speed Serial Transceivers — Multi-gigabit embedded transceivers (per Stratix II GX family)
On-chip Memory — TriMatrix embedded memory blocks (per Stratix II GX family)
Logic Element Architecture — Adaptive Logic Module (ALM)
DSP Blocks — Embedded multiplier/DSP blocks (per Stratix II GX family)
Design Tool — Quartus II (Stratix II GX support)

数据手册与资源

浏览全部产品 创建 BOM 获取报价