EP2SGX60EF1152I4N vs EP2SGX60FF1152 对比

详细并排对比 EP2SGX60EF1152I4N 出自 Intel 和 EP2SGX60FF1152 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EP2SGX60EF1152I4N EP2SGX60EF1152I4N - 60,440-LCell FPGA, 717 MHz | Intel

EP2SGX60EF1152I4N - 60,440-LCell FPGA, 717 MHz | Intel

EP2SGX60EF1152I4N ✓ 量产中
Altera
EP2SGX60FF1152 EP2SGX60FF1152 - Stratix II GX FPGA 60K LE 1152-BGA | Altera

EP2SGX60FF1152 - Stratix II GX FPGA 60K LE 1152-BGA | Altera

EP2SGX60FF1152 ⚠ 最后一次采购

规格对比

参数 EP2SGX60EF1152I4N EP2SGX60FF1152
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 有效 最后采购期
库存状态 有库存 有库存
单价(USD) $0.00 $1,950.00
Device Type FPGA —
Product Family Stratix II GX —
Logic Cells 60,440 —
Embedded Memory 2,544,192 bits 2,544,192 bits
I/O Count 534 —
Internal Frequency 717 MHz —
电源电压 1.2 V —
封装 1,152-ball FBGA 1152-BBGA, FineLine BGA (FF1152)
Package Type Other, 23 x 23 mm, 1 mm pitch, MS-034AAJ-1, FBGA-484 —
Pins 484 —
Device Technology 90 nm —
Logic Blocks 3,022 LABs —
安装类型 Surface mount Surface Mount
Operating Temperature Grade Industrial —
Compliance [DATA_NEEDED: compliance certification details] —
Transceiver Count [DATA_NEEDED: high-speed transceiver count] —
Configuration Memory [DATA_NEEDED: configuration memory specification] —
Package Pinout [DATA_NEEDED: complete ball-map pinout] —
Series — Stratix II GX
Family — Stratix II GX FPGA
Logic Elements — 60,440
DSP Blocks (18x18 Multipliers) — 192 (16 blocks)
Maximum User I/O — 364
Number of LABs/CLBs — 3022
Transceivers — 12 channels up to 3.125 Gbps
工作温度 — -40C to +85C (industrial)
Voltage - Supply — 1.2 V core / multiple VCCIO rails
Process Technology — 90 nm CMOS, SRAM-based
Configuration Method — JTAG IEEE 1149.1, Serial, Passive Parallel, Fast Passive Parallel
RoHS 状态 — Compliant

数据手册与资源

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